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For a modern single-cpu system things are transparent: there is multicore cpu, where cores are talking via uncore functions (like L3 cache, shared on-die memory controller). Uncore does also all the handling pci-e bus functions, providing access to GPU, network card or ssd for instance. I can read that a particular processor does support 40 pci-e lanes, for example.

But things go weird when I am trying to think of how does two separate processors could talk to a single gpu? How that is usually solved on multi-socket chipsets (Intel® C612 for example)? Can i use 80 pci-e lanes from both processors, to connect 80 gpus, so that every core from any of both chips can talk to every gpu?

xakepp35
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  • There is an inter-processor link between the two CPUs for memory access (see [NUMA](https://en.wikipedia.org/wiki/Non-uniform_memory_access?wprov=sfla1)), I would expect access to shared resources such as GPUs to be handled similarly. – Mokubai Feb 23 '19 at 14:59
  • @Mokubai So does they work through memory? Or does they have an additional specialized bus for sharing pci-express functions? – xakepp35 Feb 23 '19 at 15:08
  • See https://superuser.com/a/1403322/19943 for an image of how they are connected and [QPI](https://en.wikipedia.org/wiki/Intel_QuickPath_Interconnect) – Mokubai Feb 23 '19 at 15:17

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